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Silicon Labs /SiM3_NRND /SIM3U166_B /PCA_0 /LIMIT

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Interpret as LIMIT

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https://regviz.com/r/Silicon Labs/SiM3_NRND/SIM3C167_B/PCA_1/LIMIT#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0LIMIT

Description

Module Counter/Timer Upper Limit

Fields

LIMIT

Upper Limit.

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data